The present invention relates to a semiconductor device. More specifically, the present invention relates to a non-volatile semiconductor memory device.
In a floating gate type non-volatile semiconductor memory device, a current flowing in a cell under predetermined conditions and a current flowing to a reference transistor are compared by a differential amplifier so as to determine cells in an array by "0" and "1". This reference transistor is called reference cell.
Such a reference cell is generally formed to have the same structure as that of an array cell for the purpose of maintaining a similarity with respect to the cell in array, or into a so-called dummy cell type in which the control gate and the floating gate are connected to each other. In short, a reference cell array serves as a miniature version of cell array.
Also, in a reference which determines an output of a logic device, the reference level is generally limited to the threshold value of the transistor used in the logic device.
Recently, in accordance with diversification in the characteristics of devices, it becomes necessary to make determination in terms of "0", "0.5" and "1" as in the case of, for example, a multi-value memory.
With a conventional approach, in reply to such a demand, a plurality of sense amplifiers having different sense ratios are used to deal with the diversification of devices, that is, a multiplicity in value.
However, with this approach, the circuit area is increased, thereby increasing the chip area and the cost.
For verification in which the threshold value of the memory cell after programming or erase is confirmed, the non-volatile semiconductor memory device changes its verifying voltage in accordance with the state to be verified. However, when a verification is carried out in the above-mentioned manner, the voltage supply circuits are inevitably complicated.
A memory cell can be defined as a circuit of a minimum unit, for storing data in a semiconductor memory device. A memory cell consists of a transistor and a capacitor in combination. A normal semiconductor memory device is required to achieve as small distribution of memory data as possible, its memory cell array consists of a plurality of memory cells of the same type and the same size, so as to obtain as uniform characteristics as possible.
In accordance with an increase in the degree of integration of a semiconductor memory device, there is a tendency for a semiconductor memory device to be required to have not only a function as a mere memory medium but also a function of systematic operation coupled with a CPU. Such a tendency is particularly prominent in a non-volatile semiconductor memory device such as an EPROM, EEPROM or flash memory.
In reply to such requirements, it is proposed that a memory cell array of a semiconductor memory device is divided into a plurality of blocks, which are allowed to have different functions from each other, for example, as inn a bootblack mode of Intel Co. In this mode, the blocks have different functions from each other, and therefore the characteristics required from memory cells are different from one block to another. More specifically, a block in which a basic code such as for standing a system is input, involves a less number of times of rewriting of data, and therefore is required to have memory cells of a mask ROM type, whereas a block in which data is frequently rewritten, requires to have memory cells having excellent programming characteristics.
However, in a conventional semiconductor memory device, a memory cell array consists of memory cells which have the same characteristics. Consequently, a variety of requests as mentioned above cannot be satisfied. In the case where memory cells are formed to have the characteristics suitable for one block, these memory cells may cause a trouble in another block. For example, in the case where all the memory cells of a memory cell array is formed to have a large gate couple ratio, so as to improve the programming characteristics, those memory cells which belong to a block used for inputting a basic code are easily exposed to problems such as gate-disturb and soft-write.